The VLSI Handbook

Купить бумажную книгу и читать

Название: The VLSI Handbook

Автор: Wai-Kai Chen

Издательство: CRC Press

Год: 2007

Страниц: 2322

ISBN: 9780849341991, 0-8493-4199-X

Формат: PDF

Размер: 51 Мб

Язык: English

Written by a stellar international panel of expert contributors, this handbook remains the most up-to-date, reliable, and comprehensive source for real answers to practical problems. In addition to updated information in most chapters, this edition features several heavily revised and completely rewritten chapters, new chapters on such topics as CMOS fabrication and high-speed circuit design, heavily revised sections on testing of digital systems and design languages, and two entirely new sections on low-power electronics and VLSI signal processing. An updated compendium of references and other resources-such as software, databases, standards, and seminars-points toward more in-depth information.

Section I VLSI Technology

Bipolar Technology

CMOS/BiCMOS Technology

Silicon-on-Insulator Technology

SiGe HBT Technology

Silicon Carbide Technology

Passive Components

Power IC Technologies

Microelectronics Packaging

Multichip Module Technologies

Section II Devices and Their Models

Bipolar Junction Transistor Circuits

RF Passive IC Components

CMOS Fabrication

Analog Circuit Simulation

Interconnect Modeling and Simulation

Section III Low Power Electronics and Design

System-Level Power Management: An Overview

Communication-Based Design for Nanoscale SoCs

Power-Aware Architectural Synthesis

Dynamic Voltage Scaling for Low-Power Hard Real-Time Systems

Low-Power Microarchitecture Techniques and Compiler Design Techniques

Architecture and Design Flow Optimizations for Power-Aware FPGAs

Technology Scaling and Low-Power Circuit Design

Section IV Amplifiers

CMOS Amplifier Design

Bipolar Junction Transistor Amplifiers

High-Frequency Amplifiers

Operational Transconductance Amplifiers

Section V Logic Circuits

Expressions of Logic Functions

Basic Theory of Logic Functions

Simplification of Logic Expressions

Binary Decision Diagrams

Logic Synthesis with AND and OR Gates in Two Levels

Sequential Networks 32 Logic Synthesis with AND and OR Gates in Multi-Levels

Logic Properties of Transistor Circuits

Logic Synthesis with NAND (or NOR) Gates in Multi-Levels

Logic Synthesis with a Minimum Number of Negative Gates

Logic Synthesizer with Optimizations in Two Phases

Logic Synthesizer by the Transduction Method

Emitter-Coupled Logic

CMOS

Pass Transistors

Adders

Multipliers

Dividers

Full-Custom and Semi-Custom Design

Programmable Logic Devices

Gate Arrays

Field-Programmable Gate Arrays

Cell-Library Design Approach

Comparison of Different Design Approaches

Section VI Memory, Registers and System Timing

System Timing

ROM/PROM/EPROM 52 SRAM

Embedded Memory

Flash Memories

Dynamic Random Access Memory

Content-Addressable Memory

Low-Power Memory Circuits

Section VII Analog Circuits

Nyquist-Rate ADC and DAC

Oversampled Analog-to-Digital and Digital-to-Analog Converters

RF Communication Circuits

PLL Circuits

Switched-Capacitor Filters

Section VIII Microprocessor and ASIC

Timing and Signal Integrity Analysis

Microprocessor Design Verification

Microprocessor Layout Method

Architecture

Logic Synthesis for Field Programmable Gate Array (FPGA) Technology

Section IX Testing of Digital Systems

Design for Testability and Test Architectures

Automatic Test Pattern Generation 70 Built-In Self-Test

Section X Compound Semiconductor Integrated Circuit Technology

Compound Semiconductor Materials

Compound Semiconductor Devices for Analog and Digital Circuits

Compound Semiconductor RF Circuits

High-Speed Circuit Design Principles

Section XI Design Automation

Internet-Based Micro-Electronic Design Automation (IMEDA) Framework

System-Level Design

Performance Modeling and Analysis Using VHDL and SystemC

Embedded Computing Systems and Hardware/Software

Design Automation Technology Roadmap

Section XII VLSI Signal Processing

Computer Arithmetic for VLSI Signal Processing

VLSI Architectures for JPEG 2000 EBCOT: Design Techniques and Challenges

VLSI Architectures for Forward Error-Control Decoders

An Exploration of Hardware Architectures for Face Detection

Multidimensional Logarithmic Number System

Section XIII Design Languages

Languages for Design and Implementation of Hardware

System Level Design Languages

RT Level Hardware Description with VHDL

Register Transfer Level Hardware Description with Verilog

Register-Transfer Level Hardware Description with SystemC

System Verilog

VHDL-AMS Hardware Description Language

Verification Languages

ASIC and Custom IC Cell Information Representation

Test Languages

Timing Description Languages

HDL-Based Tools and Environments